New York City, New York, US
DeepMind is seeking a Low Power Design Engineer / Micro-architect to develop groundbreaking silicon for machine learning acceleration. This role involves defining low-power micro-architecture, participating in low-power design techniques, and collaborating with various teams. The ideal candidate will be a hands-on engineer with experience in ASIC design and power-efficient design.
ASIC design, micro-architecture, RTL design (Verilog/SystemVerilog), low-power design techniques, power analysis and estimation tools, UPF (Unified Power Format)
Not specified